Welcome
Back to batch
Teacher

Sweta Kumari

Videos & Materials

Introduction to Digital Logic: Logic Gates & Properties

Logic Gates & Laws of Boolean Algebra: AND, OR, NOT, NAND, NOR, XOR & XNOR

Basics of Boolean Function & Minimization of Boolean Function

Doubt Clearing Session

Karnaugh Map or K-map Basics with its Implicants: PI, EPI, NEPI & RPI

50 PYQs on Logic Gates, XOR, XNOR, NAND, NOR, Minimization of Boolean functions & K-map

Combinational Circuits: Half Adder, Full Adder, Half Subtractor & Full Subtractor

Doubt Clearing Session

Combinational Circuits: Implementation of Mux, Demux, Encoder, Decoder & Priority Encoder

50 PYQs: Implementation of Code converters, MUX, DEMUX, Adders & Subtractors

Shift Register and its Applications: SISO, PIPO, SIPO & PISO

Doubt Clearing Session

Counters: Ring, Johnson, Ripple Up and Ripple Down Counter

Doubt Clearing Session

50 PYQs: Sequential Circuits, Flip Flops, Shift Registers & Counters

Doubt Clearing Session

Flip Flop Conversions (SR , JK , T , D), Truth table, Characteristic & Excitation table

Number Representation and Computer Arithmetic: Number System and Base Conversions

Number Representation: Signed, Unsigned, Fixed and Floating Point

Practice Class

Doubt Clearing Session

Number System

Number Representation

Doubt clearing session

Introduction of Compiler

Basics of Lexical Analysis

Basics of Context Free Grammars

Doubt Clearing Session

Basics of Parsing: Types of Parsing

LL(1) Parsing & Predictive Parsing: First & Follow

GATE PYQs: Compiler Design

Doubt Clearing Session

Types of LR Parsing: LR(0), SLR(0), LALR(1), and CLR(1)

LR Parsing: LR(0), SLR(0), LALR(1), and CLR(1)

Practice Session on Parsing

Syntax Directed Translation (SDT): Applications & Implementation

Three Address Code Representation

Basics of Intermediate Code Generation

Doubt Clearing Session

Code Optimization

GATE PYQs on Compiler Design

Basics of Runtime Environment

Doubt Clearing Session

Symbol Table Implementation

GATE PYQs

Doubt Clearing Session